1. Field of the Invention
The invention relates in general to a video compression circuit and a method thereof, and more particularly to a video compression circuit and a method thereof, capable of reducing circuit cost and shortening processing delay time.
2. Description of the Related Art
Along with the popularity of network, AV streaming technology is now widely used in consumer products. As consumers' expectation of video quality is getting higher and higher, even superior video compression technologies such as MPEG4 and H.264 are provided for processing (compressing/decompressing) high resolution images. During video compression, input video signals (that is, original video signals) and reconstructed video signals (that is, compressed video signals) are stored in memories, respectively.
Currently, External Synchronous dynamic random access Memory (ESM) is used in storing the input video signals and the reconstructed video signals. During the storage of the input video signals, two input video memories are needed: one for writing the input video signals and the other for reading the input video signals. Currently, the size of the input video memory is normally one frame data. Likewise, during the storage of the reconstructed video signals, two reconstruct video memories are needed: one for writing the reconstructed video signals and the other for reading the reconstructed video signals. Currently, the size of the reconstructed video memory is at least one frame data.
However, as the video resolution is getting higher, larger memories are used for storing the video data. Consequently, the cost for the memory in a video compression circuit is increased. Thus, the cost of the video compression chip also increases.
Besides, according to generally known technology, data cannot be compressed before the input video memory is fulfilled (that is, one frame is completely inputted). Therefore, the delay time is too long (that is, the delay time is about the time length of one frame) and the compression rate is too low.
Thus, how to effectively reduce memory capacity and shorten the delay time has become a key to the performance of the video compression circuit.